The present invention relates generally to lighting devices such as electronic ballasts and LED drivers. More particularly, the present invention relates to a circuit and method for detecting power converter activity in a lighting device and protecting associated circuitry in the event of a temporary interruption in the power converter activity.
In a lighting device such as an electronic ballast or LED driver, a temporary loss of mains power input, or the sudden loss of an output load, can cause the boost converter of an active power factor correction stage to suddenly stop operating. Many circuits of a low cost product depend on the constant operation of a boost converter, such as for example Low-Voltage, Low-Power (LVLP) circuits deriving power from the boost converter's main inductor, and High-Voltage, High-Power (HVHP) circuits that are sensitive to significant changes in the main bus voltage (Vbulk). Examples of LVLP circuits include power management circuits and self-protection circuits that may need to remain active during short absences of power from the boost converter. This is possible if the LVLP circuits are aware of the momentary power interruption and are capable of managing their power consumption during the interruption.
When the internal bus voltage Vbulk drops significantly, the output of HVHP circuits, such as the arc current of an electronic ballast, tends to decrease. As the current to the gas discharge lamp is reduced, the arc voltage increases accordingly. Inverter self-protection circuitry detects this voltage and latches the ballast controller IC in an off state. If the mains input power is interrupted for a short duration such as is the case with input arcing or momentary brown-out conditions, the bus voltage Vbulk will droop momentarily and the ballast self-protection circuitry will latch off the ballast, leaving the output disabled even though (and regardless of whether) the mains input power is subsequently reapplied. Therefore, it would be desirable to detect boost converter activity, and more particularly idleness in the boost converter.
With reference to one known arrangement for accomplishing this purpose, the output of a rectifier circuit coupled to the mains input terminals is measured and when the voltage drops, during for example a brown-out or input arcing condition (to be further referred to hereinafter as a Zero Mains Event—ZME), a voltage controlled switch such as a MOSFET will turn off. This in turn causes a series of switches to “crowbar” power to ballast controller IC's and to further reset voltages on various capacitors that can otherwise cause the ballast to latch off even when the mains power input is available.
This arrangement can be sensitive to the relative magnitude of the mains input. For a product designed to operate over a wide range of input voltages, this method can cause the circuitry to work improperly. Also, this method only detects a brown-out condition or a ZME, and will not detect a condition where the PFC controller IC is idle and the mains input is applied, such as where the bus voltage Vbulk overshoots and the Over Voltage Protection (OVP) circuit or module for the PFC controller IC halts the gating signals to the boost converter. While this situation may not be an issue for products where the LVLP circuitry is referenced to the same ground as the boost converter, this method does not work for products where the LVLP circuitry is referenced to an isolated ground. This method would therefore not help LVLP circuitry conserve power derived from the boost converter while the boost converter is idle.
In another approach, the gate drive output signal from the PFC controller IC may be measured using a resistor divider. Buffered by two cascading switches, the gate drive signal is used to keep the average voltage of a timing capacitor near zero volts. When an input arc occurs, the input capacitor is discharged by the boost converter and the PFC controller IC idles with the boost converter gate drive output high, which allows the timing capacitor to charge. Once the timing capacitor is charged, the ballast controller IC's will be crow-barred or reset.
In similar fashion to the previously described approach, this method will detect a ZME but will not detect other causes for an idle boost converter, such as when the over voltage protection (OVP) circuitry or program halts the gating signals to the boost converter. LVLP circuitry deriving power from the boost converter will not be prompted to conserve power when the boost converter is idle for any reason other than a ZME.
Referring now to a previously known approach such as represented in FIG. 1, rather than measuring the gate drive signal from the boost converter, the drain-to-source voltage of the boost converter switching element (e.g., FET) can be measured. Depending on the buffering stages between the sensing resistors R2, R3 connected across the drain and source and the output reset signal, this method will respond to either a ZME or a scenario such as when the OVP halts the gating signals to the boost converter.